DDR3L: Neuer DDR3-Standard der JEDEC

Pressemitteilung der JEDEC

JEDEC Lowers the Power for DDR3, Releases SPD Spec

Arlington, VA – June 17, 2008 - Improvements in silicon production processes have enabled a reduction in the core and I/O voltage for an incremental improvement in DDR3. Called "DDR3L" for Low Voltage, the new devices will operate from a single 1.35V rail, compared to the 1.5V of existing devices, resulting in a power savings of 20% in many mainstream applications. As many computing systems work to meet growing demand for green technologies, this savings is a breath of fresh air.

These devices are intended to be compatible with existing 1.5V DDR3 systems and may operate without restriction in those applications. All JEDEC standard DDR3 memory modules include a Serial Presence Detect (SPD) device, an EEPROM readable over an SMbus, that informs the host system of the capabilities and characteristics of the module, including the supported supply voltages, so that system designs can be aware of and take advantage of the new DDR3L devices. The standard for module labels has been updated for consistency as well, with "PC3L" indicating end-user modules such as personal computers, and "EP3L" for modules targeted at embedded products.

"This announcement is consistent with trends in the industry to gracefully migrate mainstream devices to lower power as new fabrication geometries permit the lower supply voltages," said Joe Macri of AMD, chairman of the JC-42.3 memory committee. "This committee intends to continue evaluating proposals for further VDD reductions in the future, possibly 1.25V or even lower. We hope that System designers will consider making their system designs flexible to take advantage of lower VDD options in the
future."

Belal Gharaibeh, JEDEC Board representative for Hewlett-Packard, praised the new specifications. "HP supports the development of DDR3L in JEDEC as a sound proposal for an energy efficient solution that is good for the environment, users, and systems providers. It is a good extension of DDR3 technology that will extend its usefulness into the future."

JEDEC has also approved the DDR3 SPD Specification release 1 for publication that describes the encoding details of the SPD device built into DDR3 SDRAM modules.

SPD devices available in the industry include fully compatible versions with EEPROM only, compliant with JEDEC standard EE1002, or versions that also incorporate built-in thermal sensors compliant with the JEDEC specification TSE2002. Either device type may be used with the DDR3 SPD definition on memory modules.

Mian Quddus of Samsung and Chairman of the Board of JEDEC stated, "This release of the DDR3 SPD specification is a key part of the on-going enablement effort for DDR3. I applaud the efforts of the companies that collaborated on the development of this document."