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Transmeta stellt Efficeon vor

Mittwoch, 15. Okt. 2003 20:13 - [fs] - Quelle:

Transmeta will zusammen mit NVIDIA dem großen Konkurrenten Intel im mobilen Markt Probleme bereiten und etwas Umsatz abnehmen. Hierzu stellte Transmeta den neuen Efficeon-Prozessor vor, der auf dem Papier sehr interessant aussieht.

Transmetas Crusoe konnte vor allem in Europa kaum gegen die Konkurrenz von AMD und Intel Fuss fassen, sicherlich auch wegen der schlechten Performance der Crusoe-CPUs. Diese soll bei der neuen Efficeon-Generation - wie der Name "effizient" schon erahnen lässt - wesentlich höher liegen. Der Efficeon kann auf einen 1 MByte großen L2-Cache zurückgreifen, bietet Support für MMX, SSE sowie SSE2 und verfügt über eine integrierte Speicheranbindung für DDR400. Um vor allem gegen Intels erfolgreiches Centrino-Konzept anzutreten, haben sich Transmeta und NVIDIA zusammengeschlossen. Zusammen soll der Efficeon mit einem nForce3 Go vermarktet werden. Ob dieser Chipsatz allerdings standardmäßig ein W-LAN-Modul integriert hat ist fraglich. Die Details über den Chipsatz sind bislang eher spärlich gesäht. Wir sind auf die ersten Benchmarkergebnisse gespannt. Die reinen Spezifikationen scheinen sehr vielversprechend. Pressemitteilung Transmeta Introduces the Efficeon™ TM8000 Family for a New Era of High-Performance, Efficient Computing Efficeon Provides Significant Jump in Performance over Crusoe® while Maintaining Leadership in Energy Efficiency SANTA CLARA, CA - October 14, 2003 - Transmeta Corporation (NASDAQ:TMTA), the leader in efficient computing, today introduced the Efficeon TM8000 microprocessor family, establishing a new standard for high-performance, highly integrated, low-power x86-compatible computing. The Efficeon processors take efficient computing to a new level, with major innovations in Transmeta's revolutionary but proven hardware and software architecture, increased on-chip integration and new high performance interfaces.
Aimed at ultra-portable and mainstream notebook computers, as well as innovative news classes of devices such as tablet PCs, ultra-personal computers, silent desktop computers, blade servers, thin clients and embedded systems, the Efficeon processor family will be competitive with, or outperform competing microprocessors operating within critical thermal limits such as the 7W limit for typical fanless notebook designs. Systems based on the processor are expected to begin shipping in the fourth quarter. "The Efficeon processor gives system builders worldwide the capacity to design in added value, functionality, security, comfort, reliability and cost savings," said Dr. Matthew R. Perry, president and CEO, Transmeta Corporation. "At the same time, it delivers exceptional performance for a wide variety of demanding applications, from business productivity to multimedia." High Performance Engine and Interfaces Efficeon is a high-performance, low-power x86-compatible processor, based upon a new silicon microarchitecture and also a redesigned version of Transmeta's Code Morphing® Software. The microarchitecture is based on a 256-bit VLIW (Very Long Instruction Word) processor that can issue up to 8 internal instructions per clock cycle. When combined with the new Efficeon Code Morphing Software, it provides full compatibility with modern x86 software, including MMX, SSE and SSE2 multimedia instructions. Efficeon features a number of new high performance interfaces integrated into the same chip as the processor, eliminating the need for a separate Northbridge chip. Efficeon includes a high speed AGP-4X graphics interface that enables the use of industry standard high performance AGP graphics solutions. Efficeon includes a high speed DDR-400 (Double Data Rate SDRAM at 400 Megatransfers/second) memory interface, with ECC (Error Correcting Code) as an option. Efficeon includes a high performance HyperTransport interconnect for connecting to the rest of the system. Efficeon's HyperTransport interface can send data at up to 1.6 GBytes/second aggregate, which is up to 12 times faster than the I/O throughput of Crusoe's PCI interface. Efficeon also includes a high speed LPC (Low Pin Count) bus interface for communicating with the latest generation of FLASH memory. With integrated on-chip Northbridge core logic, the Efficeon TM8000 family reduces chip count and decreases the size and cost of the PC board, enabling innovative, smaller form factor designs. Transmeta and NVIDIA have been working jointly together on small package solutions. The Efficeon TM8620 21x21mm small package combined with NVIDIA's 22x22mm nForce3 Go 120 Southbridge will allow the combination of CPU, Northbridge and Southbridge to fit in a space nearly four times smaller than that of its nearest competitor. The standard model Efficeon TM8600 processor will be offered in a 29x29mm package, also smaller than the competitive processors. Initially, Efficeon silicon will be manufactured for Transmeta by TSMC in Taiwan, in TMSC's 0.13 micron (130 nanometer) CMOS technology at clock speeds starting at 1 GHz and above. Starting in the second half of 2004, Efficeon silicon will also be manufactured for Transmeta at Fujitsu's Akiruno Technology Center near Tokyo, Japan, at speeds up to 2 GHz, using Fujitsu's 90 nm CMOS process. "Efficeon represents a major leap forward in CPU performance for Transmeta," said David R. Ditzel, co-founder, vice-chairman and chief technology officer of Transmeta. "Efficeon's 256-bit VLIW engine and new Code Morphing Software represents a major step forward in computer architecture, and will help bring Transmeta into new markets."
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